Abstract

AbstractSilicon device technology is facing several difficulties. Especially, explosion of power consumption due to short‐channel effects (SCEs) becomes the biggest issue in further device scaling down. Fortunately, double‐gate (DG) MOSFETs have promising potential to overcome this obstacle. The DG‐MOSFET is recognized to be the most scalable MOSFET for its high SCE immunity. In addition, independent DG‐MOSFET (4T‐DG‐MOSFET) has great advantage to enable the threshold voltage control for the flexible power management. Through this work, we have realized ideal DG‐MOSFETs using newly developed vertical DG‐MOSFET device technology. This article examines the effectiveness of the vertical DG‐MOSFETs in future high‐performance and ultralow‐power CMOS circuits. © 2008 Wiley Periodicals, Inc. Electron Comm Jpn, 91(1): 46– 51, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/eej.10021

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