Abstract

Application specific processors are now entering the world of automotive communications. Autonomous and connected vehicles bring with them new requirements in terms of reliability and performance that can no longer be met with traditional general purpose processing units. The challenge now is not only to design the right processor that can meet the requirements available today, but also to make this design suitable for the future. For this reason, the modularity, flexibility, scalability and configurability of these future processors take, more than ever, a starring role in the early design stages. In this work, we introduce a design methodology for the automatic design of network processors based on the elastic Gateway (eGW) SoC architecture. Elastic Gateway SoC is a novel HW-centric architecture specifically designed to meet the requirements of future network processors. The architecture was introduced and evaluated from a functional perspective in previous work. Now, we are providing the complete lifecycle methodology for the design and validation of different network processing products based on this architecture. We also provide a scalability analysis in terms of HW cost and power consumption, where we see that eGW is able to provide a high level of performance at a reasonable cost.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call