Variation-resilient quantifiable plasma process induced damage monitoring

Abstract

Many wafer manufacturing processes use plasma or other charge-based effects. The resulting currents can damage or destroy MOS gate oxides of transistors in products. This plasma induced damage (PID) can be in form of a reduction of the required lifetime of the devices, which can result in systematic early product failures in the field. PID damage and the resulting reliability reduction can be invisible in zero hour parameter and product tests, which can make it particularly dangerous.Products have to be made robust against PID by antenna design rules determined during technology development and verified in qualification measurements. To prevent early product fails due to unnoticed process excursions, fast wafer level reliability (fWLR) monitoring on the fully processed product wafer is required. The performance of PID fWLR on suitable test structures and the application of the fast diagnostic stresses will be presented. Details on options for data analysis for fast, sensitive and precise process excursion detection will be discussed based on a set of productive fWLR data following this methodology where false alarms are prevented.For some excursions detected by the fast diagnostic stresses the effect on the device lifetimes will be analysed with long term MOS device stresses. The physical reason for this will be discussed in a simple model of the devices' band structures.