Variation of Threshold Voltage With Temperature in Impact Ionization-Induced Steep Switching Si and Ge Junctionless MOSFETs

Abstract

In this paper, we report on the anomalous behavior of threshold voltage ( ${V} _{\sf th})$ with temperature in junctionless (JL) transistors. It is shown that both positive and negative values of temperature coefficient of threshold voltage ( dV $_{\sf th}$ / dT ) in nMOS Si and Ge JL devices can occur at higher drain biases. At lower temperatures, ${V} _{\sf th}$ reduces with a decrease in temperature due to the dominance of bipolar effects over thermal generation of carriers, whereas at higher temperatures, thermal generation results in essentially unipolar characteristics, and ${V} _{\sf th}$ reduces with increase in temperature. It is also shown that zero temperature coefficient condition shall be nonexistent under dominant bipolar conduction over unipolar operation. Results show new viewpoints to understand the two contrasting physical mechanisms leading to positive and negative dV $_{\sf th}$ / dT values in JL devices.