Variable-function logic circuit design with memory elements

Abstract

A memory element such as a random-access (r.a.m.) may be used as a variable-logic device, the logic function being found between the address terminals and the output. This paper discusses design techniques whereby a single system of such memory elements may be used to implement several logic functions. The question of training or programming such systems is also considered with particular reference to cases in which the system is required to imitate another operational circuit. To this end a concept of ‘trainability’ is introduced and it is shown that this is a nontrivial parameter that has to be taken into account at the design stage. Trainability tests are introduced and techniques for deriving training sequences for trainable systems are derived.