Variability in SOI Schottky barrier MOSFETs

Abstract

We study the variability of the electrical characteristics of silicon-on-insulator (SOI) SB-MOSFETs. A new method by extracting the variation of the threshold voltage from a large number of devices with different SOI thicknesses enables determining the main sources of variability and distinguishing between them. It is found that the device-to-device variability is mainly due to the inherent variation of the Schottky barrier (SB) height. An additional but smaller contribution stems from fluctuations of the SOI body thickness itself. However, scaling the SOI thickness down our measurements suggest that the SB inhomogeneity increases with decreasing t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">si</sub> . Furthermore, employing dopant segregation during silicidation to realize low SB heights leads to an increase of the variability, too. Using the measured spread of Phi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">B</sub> we discuss on the base of simulations the influence of this variation on the on-current of SB-MOSFETs. The improved electrostatic gate control in multi-gate devices reduces the sensitivity of carrier injection on an inhomogeneous Phi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">B</sub> and thus suppresses the variability.