Abstract

Junctionless fin held-effect transistor (FinFET) variability due to random dopant fluctuation (RDF) was investigated for sub-32-nm technology generations using technology computer-aided design (TCAD) simulations. Results indicate that variations in threshold voltage, drive current, leakage current, and drain-induced barrier lowering are heavily impacted by RDF for junctionless FinFETs with sufficiently high channel doping (greater than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">19</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> ). Unexpectedly, the RDF impact is found to be less severe for finer technology generations, although the overall magnitude is still significant compared to line-edge-roughness-induced variability.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.