Validation of microcontroller codes: an architecture oriented approach

Abstract

PurposeThe purpose of this paper is to describe an approach towards code validation of RISC microcontrollers, which helps to automate software debugging. A static machine code analysis which checks the appropriateness of instructions in a sequence to identify any logical mistakes and also to identify redundant codes appearing in a program for the target processor is presented.Design/methodology/approachValidation is done with the help of rules of inferences formulated for the target processor. The rules govern the occurrence of illegitimate/out of place instructions and code sequences for executing the computational and integrated peripheral functions. The stipulated rules are encoded in propositional logic formulae and their compliance is tested in all possible execution paths of the application programs. An incorrect sequence of machine code pattern is identified using slicing techniques on the control flow graph generated from machine code.FindingsThe results explain that the technique is independent of compiler/assembler and contributes to early detection of software bugs that are otherwise hard to detect. Program states are identified mainly with machine code pattern, which drastically reduces the state space creation contributing to an improved state‐of‐the‐art model checking.Research limitations/implicationsThough the technique described is general, the implementation is highly architecture oriented, and hence the feasibility study is conducted only on PIC16F87X microcontrollers.Practical implicationsThis validation tool can be integrated to the system development environment resulting in improved software quality and reduced debugging time.Originality/valueIt is a novel and original approach at machine code level applicable to a wide range of processors once appropriate rules are available.