Valence-band electron-tunneling measurement of the gate work function: Application to the high-κ/polycrystalline-silicon interface

Abstract

A technique is demonstrated to measure the band alignment between the silicon substrate and the gate electrode using the valence-band electron tunneling (VBET). When an n-channel metal-oxide-semiconductor field-effect transistor is biased in inversion the valence-band electron from the Si substrate can tunnel into the gate [A. Shanware, J. Shiely, H. Massoud, E. Vogel, K. Henson, A. Srivastava, C. Osburn, J. Hauser, and J. Wortman, Tech. Dig.-Int. Electron Devices Meet.1999, 815], depending on the overlapping of the density of states in the Si valence band and the gate. This technique is suitable to measure the band alignment between the silicon substrate and the gate electrode with any given gate dielectric, provided that both the gate and substrate leakages are dominated by direct tunneling. This technique has been applied to study the SiO2/polycrystalline-silicon (poly-Si) interface behavior in the presence of submonolayer traces of HfO2. The general applicability of VBET to arbitrary gate stacks is finally demonstrated with the HfSiON/poly-Si case.