Using transformations and verification in circuit design

Abstract

We show how machine-checked verification can support an approach to circuit design based on two kinds of refinement. This approach starts with a conceptually simple (but inefficient) initial design and uses a combination of ad hoc refinement and algorithmic transformation to produce a design that is more efficient (but more complex). We present an example in which we start with a simplified CPU design and derive an efficient pipelined form, including circuitry for reverting the effects of partially executed instructions when a successful branch is detected late in the pipeline. The algorithmic stage of our derivation applies a transormation, retiming, that has been proven to preserve functional behavior in the general case. The ad hoc stage requires special justification, which we supply in the form of a machine-checked formal verification.