Using Memristors for Robust Local Learning of Hardware Restricted Boltzmann Machines

Maxence Ernoult,Damien Querlioz,Julie Grollier

doi:10.1038/s41598-018-38181-3

Abstract

One of the biggest stakes in nanoelectronics today is to meet the needs of Artificial Intelligence by designing hardware neural networks which, by fusing computation and memory, process and learn from data with limited energy. For this purpose, memristive devices are excellent candidates to emulate synapses. A challenge, however, is to map existing learning algorithms onto a chip: for a physical implementation, a learning rule should ideally be tolerant to the typical intrinsic imperfections of such memristive devices, and local. Restricted Boltzmann Machines (RBM), for their local learning rule and inherent tolerance to stochasticity, comply with both of these constraints and constitute a highly attractive algorithm towards achieving memristor-based Deep Learning. On simulation grounds, this work gives insights into designing simple memristive devices programming protocols to train on chip Boltzmann Machines. Among other RBM-based neural networks, we advocate using a Discriminative RBM, with two hardware-oriented adaptations. We propose a pulse width selection scheme based on the sign of two successive weight updates, and show that it removes the constraint to precisely tune the initial programming pulse width as a hyperparameter. We also propose to evaluate the weight update requested by the algorithm across several samples and stochastic realizations. We show that this strategy brings a partial immunity against the most severe memristive device imperfections such as the non-linearity and the stochasticity of the conductance updates, as well as device-to-device variability.

Highlights

Such hardware neural networks can be trained ex situ: the synaptic weights are optimally determined on conventional central or graphical processing units, and transferred onto memristive hardware[7,8]
We propose implementing variations of Restricted Boltzmann Machines (RBMs) that allow in situ learning with a local learning rule, and where memristive device programming can be achieved in a very simple way
All the simulations presented in this paper have been carried out at a level which highlights the effects of the weight update physics and the learning rules it enables on the different neural network architectures introduced thereafter

Summary

Introduction

Such hardware neural networks can be trained ex situ: the synaptic weights are optimally determined on conventional central or graphical processing units, and transferred onto memristive hardware[7,8]. A local learning rule calls for a weight update which solely depends on the two neurons connected to this weight: from a hardware viewpoint, the conductance of a memristive device is programmed by the voltage difference between the pre- and post- synaptic neurons. For this reason, its theoretical implementation with memristive devices has been extensively studied[12,13,14,15,16,17,18], most demonstrations of memristive in situ learning hardware is single layer, when backpropagation becomes local[7,19].

Objectives

Results

Conclusion