Abstract
In this paper, Long Short-Term Memory (LSTM) is used to predict transistor degradation due to Negative-Bias Temperature Instability (NBTI). The LSTM is trained by Technology Computer-Aided Design (TCAD) generated NBTI data and then used to predict the future degradation based on the future stress pattern (i.e. the future gate voltage sequence). It is also used to predict the degradation due to other random stress patterns at different frequencies. It is found that the LSTM trained by NBTI data due to random gate pulses at 100MHz clock frequency can 1) predict the NBTI due to other random gate pulses, 2) predict the NBTI up to 2 times longer time than it is trained for, and 3) predict the NBTI of 10 times higher and lower clock frequencies. Moreover, it can capture the Transient Trap Occupancy Model (TTOM) and Activated Barrier Double Well Thermionic (ABDWT) models well. It is shown that the framework works for both 2D and 3D simulations and, thus, can save a substantial amount of TCAD simulation time.
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