Using integer linear programming for instruction scheduling and register allocation in multi-issue processors

Abstract

Instruction scheduling and register allocation are two very important optimizations in modern compilers for advanced processors. These two optimizations must be performed simultaneously in order to maximize the instruction-level parallelism and to fully utilize the registers [1]. In this paper, we solve register allocation and instruction scheduling simultaneously using integer linear programming (ILP). We have successfully worked out the ILP formulations for the problem with and without register spilling. Two kinds of optimizations are considered: 1. (1) fix the number of free registers and then solve the minimum number of cycles to execute the instructions, or 2. (2) fix the maximum execution cycles for the instructions and solve the minimum number of registers needed. Besides being theoretically interesting, our solution serves as a reference point for other heuristic solutions. The formulations are also applicable to high-level synthesis of ASICs and designs for embedded processors. In these application domains, the code quality is more important than the compilation time.