Using computer models to identify optimal conditions for flip‐chip assembly and reliability

Abstract

Flip‐chip assembly, developed in the early 1960s, is now being positioned as a key joining technology to achieve high‐density mounting of electronic components on to printed circuit boards for high‐volume, low‐cost products. Computer models are now being used early within the product design stage to ensure that optimal process conditions are used. These models capture the governing physics taking place during the assembly process and they can also predict relevant defects that may occur. Describes the application of computational modelling techniques that have the ability to predict a range of interacting physical phenomena associated with the manufacturing process. For example, in the flip‐chip assembly process we have solder paste deposition, solder joint shape formation, heat transfer, solidification and thermal stress. Illustrates the application of modelling technology being used as part of a larger UK study aiming to establish a process route for high‐volume, low‐cost, sub‐100‐micron pitch flip‐chip assembly.