Abstract
Fault mitigation techniques based on pure software, known as software-implemented hardware fault tolerance (SIHFT), are very attractive for use in COTS (commercial off-the-shelf) microprocessors because they do not require physical modification of the system. However, these techniques cause software overheads that may affect the efficiency and costs of the overall system. This paper presents a design method of radiation-induced fault-tolerant microprocessor-based systems with lower execution time overheads. For this purpose, approximate computing and selective fault mitigation software-based techniques are used; thus it can be used in COTS devices. The proposal is validated through a case study for the TI MSP430 microcontroller. Results show that the designer can choose among a wide spectrum of design configurations, exploring different trade-offs between reliability, performance, and accuracy of results.
Highlights
The susceptibility of modern systems to radiation effects has been increasing mainly due to technological scaling [1]
In microprocessor-based systems, since the fault mitigation techniques based on pure software, known as software-implemented hardware fault tolerance (SIHFT) [6], do not require physical modification of the components of the system; they are attractive for use in COTS devices
We propose using software-based approximate computing (AC) techniques along with SIHFT strategies to reduce overheads associated with the design of fault-tolerant systems based on COTS processors
Summary
The susceptibility of modern systems to radiation effects has been increasing mainly due to technological scaling [1]. While these faults may be transient ( known as soft errors) and permanent, they might affect the behavior of the system, causing malfunctions or crashes in modern electronic systems [2,3]. Many of the SIHFT techniques are based on software redundancy, so they can cause significant overheads (mainly execution time overheads), which can make these mitigation techniques inappropriate in many cases. To reduce these overheads, researchers have proposed mitigation schemes based on selective or partial redundancy [7,8]. If the impact of a high energy particle causes the generation of an electron-hole pair, a bit flip may occur. When the change of the bit occurs in a combinational circuit, the effect is called single event transient—SET [3]
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