Use of high dielectric constant insulators for bypass capacitance in WSI and wafer scale hybrid multichip modules

Abstract

The exceptionally large amounts of bypass-capacitance requirements of wafer scale integration (WSI) and wafer scale hybrid packaging/multichip module (WSHP/MCM) based systems operating at state-of-the-art switching speeds are explored. The capacitance required may become considerably larger than can be obtained by simply making thin-oxide-metal-plate capacitors unless alternate design styles which exhibit less switching noise are adopted for the circuits employed. Some of the criteria for picking the value of the bypass capacitance are examined, together with techniques for introducing high-dielectric-constant materials into the processing of the semiconductor substrates. The possibility of depositing thin layers of amorphous BaTiO/sub 3/ at low temperature to form a reliable, pin-hole free dielectric for bypass capacitance by use of ionized cluster beam techniques is explored. Deposition of the amorphous material on both metal and semiconductor substrates is possible. >