Use of Bilayer Gate Insulator in GaN-on-Si Vertical Trench MOSFETs: Impact on Performance and Reliability.

Kalparupa Mukherjee,Stefaan Decoutere,Matteo Borga,Enrico Zanoni,Benoit Bakeroot,Matteo Meneghini,Shuzhen You,Gaudenzio Meneghesso,Karen Geens,Carlo De Santi

doi:10.3390/ma13214740

Kalparupa Mukherjee, Stefaan Decoutere + Show 8 more

Open Access

https://doi.org/10.3390/ma13214740

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Journal: Materials	Publication Date: Oct 23, 2020
Citations: 13	License type: CC BY 4.0

Affiliation: University of Padua, IMEC, Ghent University

Abstract

We propose to use a bilayer insulator (2.5 nm Al2O3 + 35 nm SiO2) as an alternative to a conventional uni-layer Al2O3 (35 nm), for improving the performance and the reliability of GaN-on-Si semi vertical trench MOSFETs. This analysis has been performed on a test vehicle structure for module development, which has a limited OFF-state performance. We demonstrate that devices with the bilayer dielectric present superior reliability characteristics than those with the uni-layer, including: (i) gate leakage two-orders of magnitude lower; (ii) 11 V higher off-state drain breakdown voltage; and (iii) 18 V higher gate-source breakdown voltage. From Weibull slope extractions, the uni-layer shows an extrinsic failure, while the bilayer presents a wear-out mechanism. Extended reliability tests investigate the degradation process, and hot-spots are identified through electroluminescence microscopy. TCAD simulations, in good agreement with measurements, reflect electric field distribution near breakdown for gate and drain stresses, demonstrating a higher electric field during positive gate stress. Furthermore, DC capability of the bilayer and unilayer insulators are found to be comparable for same bias points. Finally, comparison of trapping processes through double pulsed and Vth transient methods confirms that the Vth shifts are similar, despite the additional interface present in the bilayer devices.

Highlights

Vertical GaN technologies [1,2,3,4,5,6,7,8,9,10] are gaining popularity for power conversion applications [8,11], owing to the superior power handling capabilities compared to the lateral configuration [12,13,14], combined with the inherent material advantages of GaN
The aim of this work is to advance the understanding on the leakage, reliability, and trapping related to the gate stack of vertical GaN-on-Si MOSFETs
(i) we investigate the degradation processes of the gate insulator subject to electrical stress at high field for devices with uni-layer dielectrics; (ii) we propose to use a bilayer dielectric stack (Al2 O3 followed by SiO2 ) with the aim of improving device stability and reliability; (iii) we demonstrate the net superiority of the bilayer dielectric scheme, compared to the uni-layer

Summary

Introduction

Vertical GaN technologies [1,2,3,4,5,6,7,8,9,10] are gaining popularity for power conversion applications [8,11], owing to the superior power handling capabilities compared to the lateral configuration [12,13,14], combined with the inherent material advantages of GaN. Trench MOSFETs on Si substrates [3,4,8,10] have substantial economic advantages, in addition to promising performance metrics. The performance and degradation issues related to the gate oxide of vertical GaN. MOSFETs still have to be investigated in detail. Several papers (see for instance [15,16])

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