Upgrade of the ALICE muon trigger electronics

Abstract

The ALICE muon trigger is a large scale detector based on single gap bakelite RPCs.An upgrade of the electronics is needed in order to withstand theincrease of luminosity after the LHC Long Shutdown-2 in 2018-2019. Thedetector will be read out at the minimum bias rate of 100 kHz inPb–Pb collisions (including a safety factor of 2), two orders ofmagnitude above the present design. For the most exposed RPCs and inthe present conditions of operation, the total integrated charge couldbe as high as 100 mC/cm2 with rates up to 100 Hz/cm2, which isabove the present limit for safe operation. In order to overcome theselimitations, upgrade projects of the Front-End (FE) and ReadoutElectronics are scheduled. The readout upgrade at high rate with lowdead time requires changing most of the present electronics. Itinvolves a new design for the 234 Local cards receiving the LVDSsignals from the FE electronics and the 16 Regional concentratorcards. The readout chain is completed by a single Common Readout Unitdeveloped for most ALICE sub-detectors. The new architecture of themuon trigger readout will be briefly presented. The present FEelectronics, designed for the streamer mode, must be replaced toprevent ageing of the RPCs in the future operating conditions. The newFE called FEERIC (for Front-End Electronics Rapid Integrated Circuit)will have to perform amplification of the analog input signals. Thiswill allow for RPC operation in a low-gain avalanche mode, with a muchsmaller charge deposit (factor 3-5) in the detector as compared to thepresent conditions. The purpose is to discriminate RPC signals with acharge threshold around 100 fC, in both polarities, and with a timejitter below 1 ns. We will describe the FE card and FEERIC ASICfeatures and first prototype performance, report on test resultsobtained on a cosmic test bench and discuss ongoing developments.