Untrimmed BGR of 1.1% $3\sigma$ Based on Dynamic-Biased Op Amp With Reduced ${V} _{\rm off}$

Abstract

This brief presents an untrimmed sub-1V CMOS bandgap reference (BGR) where a dynamic-biased error amplifier (EA) is invented to accomplish small input-referred offset voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> ) and improve PSRR of BGR. In the dynamic-biased EA, an intended negative-feedback loop does dominantly work on the reduction of V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> and supply noise influx. Simulation results confirm that V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> of the proposed EA represents 2.3% distribution whereas each V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> of the separate biased EA and the conventional EA shows 4.8% and 15% distributions, respectively. And the PSRR of the proposed EA-based BGR is increased by 23 dB comparing with the separate biased EA-based BGR around 2.5 MHz, and by 34 dB comparing with the conventional biased EA-based BGR around 1 MHz. By adopting the proposed feedback-biased EA, the 40-nm CMOS BGR circuit has been implemented to achieve superior 3σ inaccuracy of 1.1% and temperature variation of 13 ppm/°C without trimming.