Abstract
To provide designers with an efficient low power design flow, several methodologies have been proposed such as the Unified Power Format (UPF). The main issue faced by designers is the non-interoperability of those methods across different Computer Aided Design (CAD) tools. Although the UPF standard was originally created with interoperability in mind, few of its constructs are actually supported by all CAD vendors. In this paper, we aim at providing a UPF 2.0 methodology that is compatible with different tools. The proposed case study is a circuit with three power domains and a cross-vendor UPF specification. This paper demonstrates a full low power design flow, with formal power checking, power aware simulation, synthesis and back-end.
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