Abstract
A single unified analytical model is presented to predict the shot noise for both the source-to-drain (SD) and the gate tunneling current in sub-10 nm MOSFETs with ultrathin oxide. Based on the Landauer formula, the model is constructed from the sequential tunneling flows associated with number fluctuations. This approach provides the analytical formulation of the shot noise as a function of the applied voltages. The model performs well in predicting the Fano factor for shot noise in the SD and gate tunneling currents.
Highlights
Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations
CMOS logic devices has made the quantum nature of current flow more pronounced, leading to higher fault rates due to shot noise in the subthreshold region [14]. These factors set fundamental limits on future CMOS technologies, because significant tunneling currents and shot noise are expected under normal operating conditions
For extremely short channel lengths and ultrathin gate oxide thickness, the tunneling current with 2D (n = 2) and 3D (n = 3) density-of-states (DOS) between two electron reservoirs separated by the energy barrier is given by the Landauer formula [4,24]
Summary
Shot Noise in the Tunneling Current in Sub-10 nm MOSFETs. Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. CMOS logic devices has made the quantum nature of current flow more pronounced, leading to higher fault rates due to shot noise in the subthreshold region [14]. These factors set fundamental limits on future CMOS technologies, because significant tunneling currents and shot noise are expected under normal operating conditions. A single unified analytical expression is presented for the SD and gate tunneling currents and the associated shot noise, emphasizing their similarities and differences It provides a fully analytical and explicit function of bias conditions and device structural parameters and can be suitably implemented into a circuit simulator.
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