Abstract
Crystalline tin oxide has been investigated for industrial applications since the 1970s. Recently, the amorphous phase of tin oxide has been used in thin film transistors (TFTs) and has demonstrated high performance. For large area electronics, TFTs are well suited, but they are subject to various instabilities due to operating conditions, such as positive or negative bias stress PBS (NBS). Another instability is hysteresis, which can be detrimental in operating circuits. Understanding its origin can help fabricating more reliable TFTs. Here, we report an investigation on the origin of the hysteresis of solution-processed polycrystalline SnO2 TFTs. We examined the effect of the carrier concentration in the SnO2 channel region on the hysteresis by varying the curing temperature of the thin film from 200 to 350 °C. Stressing the TFTs characterized further the origin of the hysteresis, and holes trapped in the dielectric are understood to be the main source of the hysteresis. With TFTs showing the smallest hysteresis, we could fabricate inverters and ring oscillators.
Highlights
With the development of amorphous oxide semiconductor (AOS) electronics, various oxide-based semiconductors have been investigated
Indium gallium zinc oxide (IGZO) [1], indium zinc oxide (IZO) [2], indium gallium oxide (IGO) [3], zinc tin oxide (ZTO) [4], and indium zinc tin oxide (IZTO) [5] all have in common an amorphous phase, a conduction through s orbitals, optical transmittance of ~80% in the visible region, and offer a mobility of ~10 cm2/Vs [1]
High mobility thin film transistors (TFTs) are obtained and we studied the hysteresis behaviors of the polycrystalline Solutions of HfO2 (SnO2) TFTs
Summary
With the development of amorphous oxide semiconductor (AOS) electronics, various oxide-based semiconductors have been investigated. The amorphous phase of tin oxide [15,16] has demonstrated possible use in TFTs, reaching similar performances as the polycrystalline counterpart. In all these studies authors used a high-k dielectric as the gate insulator (ZrO2, HfO2, Al2O3), and a very thin channel layer (less than 10 nm). With the use of high-k dielectrics [17], it is possible to obtain clockwise or anticlockwise hysteresis in the TFTs. The reasons are multiple, but shortly, in n-type based TFTs, the clockwise hysteresis can be resulting from the semiconductor (trapping of the electrons), while the anticlockwise from the gate dielectric (due to the movement of mobile ions for example) [18]. By varying the sweep rate and applying negative and positive bias stresses to the TFTs, we can clearly identify the origin of the hysteresis
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