Abstract
As operating frequency and circuit density of VLSI systems continue to increase, the L*di/dt induced voltage fluctuations in the power grid increasingly becomes a source of voltage/timing problems. On-chip decoupling capacitors, placed in close proximity to the power grid conductors, can offset parasitic inductances and thereby reduce the high frequency noise. High capacitance density MIM capacitors, placed between the last two metal layers, have been shown to be effective in achieving on-chip decoupling in high performance processors. There have been many reports in the literature on the use of high-k material such as Ta <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sub> , HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> , ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> for MIM capacitors [1-5]. A large number of reports of high-k MIM are focused on DRAM rather than decoupling capacitors applications [2-4]. One important difference between the DRAM capacitor module and decoupling capacitors is the thermal budget requirement. DRAM capacitors allow a higher thermal budget (~700°C) compared to embedded decoupling capacitors which must meet the BEOL thermal budget requirement (~400°C). We have recently reported an improved reliability by addition of Al into ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> [6]. In this work, we report detailed material, electrical and further reliability characterization of ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -based MIM capacitor capable of meeting stringent reliability requirement while maintaining compatibility with the backend processing thermal budget. A capacitor with >20fF/μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> capacitance density and leakage current density <;100nA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> meeting lifetime target (operated on both polarities) is demonstrated.
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