Abstract

The impact of the surface orientation, strain, fin doping, and gate stack on SOI double-gate FinFET mobility is systematically investigated. Impact of channel material, temperature, and fin width were also touched upon to better understand the trends. For the unstrained case, the (110) sidewall electron mobility is very close to the (100) sidewall electron mobility irrespective of the fin doping level and gate stack. This weak dependence of electron mobility to surface orientation distinguishes the FinFETs from the bulk planar MOSFETs, where (100) electron mobility is systematically reported to be much higher than that of (110). On the other hand, the (110) sidewall hole mobility is substantially higher than the (100) sidewall hole mobility in FinFETs, as in the planar case. Both the (100)/<100> and (110)/<110> FinFET electron mobility can be improved with tensile strain. It is also confirmed that the (110)/<110> FinFET hole mobility can be significantly improved with compressive strain while the (100)/<100> hole mobility is sensitive to neither compressive nor tensile strain. Compared to Si, the use of a SiGe channel increases the hole mobility drastically, and even further improvement is achievable by external compressive stress. Overall, the experimental results in this chapter suggest that the (110)/<110> Si FinFETs conventionally built on standard (100) wafers offer simultaneously high electron and hole mobility, which can be further improved by tensile and compressive stress, respectively.

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