Understanding PCB Design Parameters for Optimal Thermal Performance of Surface-Mount SiC MOSFETs

Abstract

For the same blocking voltage rating and on-state resistance, Silicon Carbide (SiC) MOSFETs die is thinner and smaller compared to Si counterpart due to SiC material's superior electric-field withstanding capability. This smaller die size improves the switching performance significantly but deteriorates the thermal performance of the device packaging. This makes thermal design more challenging when using SiC MOSFETs. When using surface-mount (SM) packaging, printed circuit board (PCB) design plays a key role in the overall thermal design. Understanding the PCB design choices is necessary to maximize the performance of SM SiC MOSFET. This paper investigates several key factors in the thermal design of FR4 PCB to reduce junction temperature (Tj) of surface-mount (SM) SiC MOSFETs in steady-state and overload transient conditions. The factors of interest include heat sinks, copper area per device, and copper thickness. In experiments, doubling PCB copper area can reduce Δ <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$T_{j}$</tex> by > 40% in steady-state operation, making it the dominant factor. Experiments are performed on a two-layer PCB with a 900 V, 20 mΩ SiC device in D2Pak-7L package. For steady-state performance, doubling PCB copper area reduced the junction temperature rise by > 40%, making it the dominant design factor for steady-state thermal performance. For transient tests, copper thickness is the most critical factor. Junction temperature rise reduced by > 30% when PCB copper thickness is increased from 2 ounces (oz) to 6 oz. Experimental data is provided at various current stress levels for nominal steady-state and overload transient conditions. The findings provide thermal design guidelines of FR4 PCB for SM SiC MOSFETs in various applications.