Understanding defect kinetics in ultra-thin dielectric logic and memory devices using random telegraph noise analysis

Abstract

The root cause of degradation and failure in nanoscale logic and memory devices originates from discrete defects (traps) that are created in the ultra-thin dielectrics during fabrication (process-induced) and / or voltage and temperature stress (stress-induced). In order to probe the chemistry of every discrete trap in terms of its bond state, charge state, physical location, region of influence, activation (relaxation) energy and trap depth below conduction band, low frequency noise (LFN) based measurement and analysis is a good approach as the random telegraph noise (RTN) signals which form the characteristic behavior of every trap undergoing stochastic carrier capture and emission process contain a wealth of information on the defect energetics. With nanodevices still undergoing aggressive device scaling, the presence of a finite number of discrete defects in logic and memory devices makes it easier to collect RTN signals and analyze them in detail. This study presents an overall perspective to current developments in RTN-based studies on logic and memory devices and their impact on the variability in performance metrics. This is by no means an exhaustive overview; however, the key advancements in RTN as an effective defect spectroscopy tool are highlighted.