Abstract

The explosive growth of digital wireless communication systems has led to a need for high-speed and high-resolution bandpass analog-to-digital converters. This paper presents the design and analysis of a continuous-time bandpass multistage noise shaping (MASH) /spl Sigma//spl Delta/ modulator. The design employs undersampling relative to the intermediate frequency while oversampling the signal bandwidth, which lowers the sampling rate. Clocking at a low frequency reduces the complexity and power consumption of the subsequent digital signal processing stags, which is the most important concern for integrated wireless devices. It also allows the use of standard CMOS technology. In addition, the design uses multistage architecture to provide high-order noise shaping and high resolution. The transfer functions of the complete design (filter and other circuits), which is a mixed signal system, are derived. Optimum parameters are provided for achieving a loop transfer function that matches standard discrete time bandpass MASH /spl Sigma//spl Delta/ modulator which always stable.

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