Abstract
We present UTBB devices with a gate length (L G ) of 25nm and competitive drive currents. The process flow features conventional gate-first high-k/metal and raised source/drains (RSD). Back bias (V bb ) enables V t modulation of more than 125mV with a V bb of 0.9V and BOX thickness of 12nm. This demonstrates the importance and viability of the UTBB structure for multi-V t and power management applications. We explore the impact of GP, BOX thickness and V bb on local V t variability for the first time. Excellent A Vt of 1.27 mV·µm is achieved. We also present simulations results that suggest UTBB has improved scalability, reduced gate leakage (I g ) and lower external resistance (R ext ), thanks to a thicker inversion gate dielectric (T inv ) and body (T si ) thickness.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
