Abstract
This paper proposes low power, low voltage Truly Random Number Generators (TRNG) for Electrical Product Code (EPC Generation 2 Radio Frequency Identification (RFID) tag. Design considerations and trade-offs among randomicity, chip area and power consumption are analyzed according to the special requirements of Gen2 RFID tag. The proposed TRNG circuits consist of an analog random seed generator which uses the oscillator sampling mechanism, and Linear Feedback Shift Registers for post digital processing. These TRNG are implemented in SMIC 0.18 μm CMOS process. And their randomicity performances are verified by the FIPS 140-2 standard for security. One of the TRNG circuits outputs a random bit series at a speed of 40 kHz. Its power consumption is 1.04 μW and chip area is 0.05 mm2. The other one has a bit rate at 48 kHz. It has a power consumption of 2.6 μW and chip area of 0.018 mm2. The features of low power and small chip area in these TRNG circuits provide a good choice to solve the security and privacy problems in RFID systems.
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