Ultralow-Power Synchronous Demodulation for Low-Level Sensor Signal Detection

Abstract

The design and experimental characterization of a high-resolution analog lock-in amplifier (LIA)-based measurement system is presented in this paper. Different design strategies are used to attain a versatile solution which features programmable gain (72.6–82.6 dB) and operating frequency (5–115 kHz), preserving good recovery performance. The prototype, integrated into the United Microelectronics Corporation 0.18- $\mu\text{m}$ CMOS process with a single supply voltage of 1.8 V, achieves a resolution of 200 nV and a high dynamic reserve of 43.5 dB, showing significantly lower power consumption ( $885~\mu \text{W}$ ) than high-resolution state-of-the-art LIAs with minimum size (0.075-mm2 silicon area). To validate the amplitude recovery performance of the proposed single-phase LIA, it was used to measure the equivalent value of a passive resistive sensor, exhibiting a maximum error of 1.9% when $\text{R}_{\mathrm {S}}$ is varied from $100~\Omega $ to 10 $\text{k}\Omega $ with an input signal in the order of hundreds of microvolts. Thus, it constitutes a highly suitable choice for portable and lab-on-a-chip sensing applications.