Ultrafast Characterization of Hole Trapping Near Black Phosphorus–SiO2 Interface During NBTI Stress in 2-D BP p-FETs

Abstract

2-D p-channel FETs with black phosphorus (BP) channel and silicon dioxide (SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) gate oxide have been fabricated. An ultrafast characterization method (10-μs delay) is used to measure the shift in threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> ) during and after negative bias temperature instability (NBTI) stress under different gate biases (VGSTR) and temperatures (T). The V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> stress and recovery kinetics are ascribed to hole trapping and detrapping (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">HT</sub> ) near the BP-SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interface, due to the choice of channel material, SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> thickness (T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OX</sub> ), and stress (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GSTR</sub> /T) conditions. A detailed analysis is done to determine the projected magnitude of V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> without any delay, for different VGSTR and T, and at thinner T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OX</sub> relevant for realistic end-use cases.