Ultra-broadband, compact, CMOS compatible arbitrary ratio power splitter with very low excess loss

Abstract

We designed an ultra-broadband, compact, CMOS compatible, arbitrary ratio power splitter based on 220-nm-thick silicon-on-insulator (SOI) platform. The geometry of power splitter was digitalized into 20 parameters. For each different power splitting ratio (PSR), these 20 parameters were optimized to achieve low excess loss, using variational finite difference time domain (varFDTD) simulation and adjoint shape optimization. After many iterations of optimization, the structure was finally determined. The simulated excess loss was optimized to a low value, which was below 0.13dB. The PSR variation was limited to less than 0.459dB over 500 nm, across the O band and C band, showing that the PSR of the device was wavelength independent. An order of magnitude smaller than other kind of typical power splitters, the footprint of the proposed device is only about 1.2 μm × 2 μm, ensuring the compactness of the photonic integrated circuits (PICs). Simultaneously, it is easy to fabrication since the boundaries are smooth with a fairly large feature size.