Abstract

The Ultra-Thin SOI and BOX substrates are the foundation of Fully Depleted planar technology, a CMOS scaling solution for 20 nm node and beyond. Using the Smart CutTM technology, UTSOI substrates development, with SOI & BOX thickness reduced down to 12 & 25 nm respectively, is on the way to High Volume Manufacturing by the end of 2011. To improve device Vt variation control, SOI total layer thickness variation of less than +/- 1 nm for all the measured points and all the preproduction wafers is already achieved and +/- 0.5 nm variation is targeted. Tight SOI thickness variation at device scale and BOX thickness variation are also demonstrated.

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