Abstract
Abstract“Heterogeneous Integration” is a promising approach for high‐performance hybrid flexible electronics that combine printed electronics and silicon technology. Despite significant progresses made by integrating rigid silicon chips on flexible substrates, the integration of flexible ultra‐thin chips (UTCs) on flexible foils remains a challenge as they are too fragile for conventional bonding methods. Reliable interconnects (low‐resistivity and mechanical robustness) and bonding of UTCs are critical to the realization of hybrid flexible systems. Herein, using a non‐contact printing approach, an easy and cost‐effective method for accessing UTCs on flexible foils is demonstrated. The high‐viscosity conductive paste, extruded from a high‐resolution printer (1–10 µm line width), is used here to connect the metal oxide semiconductor field effect transistors (MOSFETs) on UTCs with the extended pads on flexible printed circuit boards (PCBs). The electrical characterization of MOSFETs, before and after printing the interconnects, reveals an acceptable level of variation in device mobility (change from 780 to 630 cm2 V−1s−1). This is due to the drop in effective drain bias voltage as a marginally small electrical resistance (≈30 Ω) is added by the printed interconnects. The bonded UTCs show robust device performance under bending conditions, indicating high reliability of both the chip thinning and bonding methods.
Highlights
“Heterogeneous Integration” is a promising approach for high-performance and printed electronics, as hybrid systems, hybrid flexible electronics that combine printed electronics and silicon technology
The electrons trapped at low energy levels are released back to the channel immediately, but the ones trapped at higher energy levels require more time, which results in a decrease in the number of carriers in the channel and simultaneously affects the key parameters of the MOSFET
The key parameters of the device remain constant over 2000 s, which confirms that the dielectric/channel interface quality is not affected by the thinning process
Summary
A silicon chip with a matrix of 4 × 4 MOSFET devices was used in this study to demonstrate the reliable bonding of UTCs on flexible substrate. Backside lapping process assisted with polymethyl methacrylate (PMMA) sacrificial technique was utilized for thinning the MOSFET chip. The importance of PMMA sacrificial layer was presented during the process of separating the UTC from the sample holder after thinning.[21] Without such technique, the thinned chip (
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