Abstract
A new challenge is to incorporate not only passive components, but active circuitry (ICs) and the necessary thermal management as well. Ultra thin chips (i.e. silicon dies thinned down to /spl sim/50 /spl mu/m total thickness) lend themselves to reach these goals. Chips with that thickness can be embedded in the dielectric layers of modern laminate PCBs. Micro via technology allows to connect the embedded chip to the outer faces of the system circuitry. As an ultimate goal for microsystem integration, the embedding of optical and fluidical system components can be envisioned. This paper presents the first approach to embed thin silicon dies in to polymeric system carriers. The aspects of embedding and making the electrical contact as well as the thermal management are highlighted. To reach the goal of a vertically stackable "box-of-bricks" type of ultra thin chip scale package (UT-CSP), thin silicon chips are embedded and interconnected on a peripherally routed interposer substrate.
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