Ultra low power design of multi-valued logic circuit for binary interfaces

Abstract

From the dawn of the computer age, man has mass produced binary components for computers, due to which ternary or higher radix computers are not yet commercially used. It has been proved that ternary logic can be more efficient than binary logic and there are many devices in development that operate on more than two internal states. Therefore an efficient method to produce multi-valued logic on the basis of binary input provided is needed. In this article, an effective, simple, flexible, and low power consumption implementation has been proposed that can convert any binary number to a number of chosen radix. The proposed design is implemented in 32 nm TSMC CMOS. The proposed design is then evaluated in power/delay space and its performances are compared with the latest state of art designs. The proposed circuit exhibits power saving up to 92% over previous models.