Abstract

The embedded systems, IoT (Internet of Things) devices, and portable electronic devices spread very quickly recently. Most of them depend on batteries to operate. The target of this work is to decrease energy consumption by (1) using Multiple-valued logic (MVL) that shows notable enhancements regarding energy consumption over binary circuits and (2) using carbon nanotube field-effect transistors (CNFET) that show better performance than CMOS. This work proposes ternary combinational circuits using 32 nm CNFET: Ternary Half Adder (THA) with 36 transistors and Ternary Multiplier (TMUL) with 23 transistors. To reduce energy consumption by utilizing the unary operator of the ternary system and employing two voltage supplies ( $V_{dd}$ and $V_{dd}$ /2). The result of extensive HSPICE simulations regarding PVT (Process, Voltage, and Temperatures) variations and Noise Immunity Curve (NIC) show the improvements of the proposed designs up to 25% in transistors count and up to 98% in energy consumption reductions. Further, increasing the robustness of process variations and the noise tolerance compared to recent similar designs.

Highlights

  • INTRODUCTIONThere are two essential things to be considered for designing the proposed circuits: (1) Carbon Nano-Tube Field-Effect Transistor (CNTFET) and (2) Multiple-Valued Logic (MVL)

  • The advantage of the carbon nanotube field-effect transistors (CNFET) transistor is that its threshold voltage depends on its CNT diameter as shown in equation (2), which is suitable to be used in Multiple-Valued Logic (MVL) circuits

  • PROPOSED TERNARY COMBINATIONAL CIRCUITS This paper proposes a Ternary Half Adder (THA) with 36 CNFETs and a Ternary Multiplier (TMUL) with 23 CNFETs using transmission gates (TGs), unary operators, two voltage supplies (Vdd, Vdd/2), and special transistors arrangements

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Summary

INTRODUCTION

There are two essential things to be considered for designing the proposed circuits: (1) Carbon Nano-Tube Field-Effect Transistor (CNTFET) and (2) Multiple-Valued Logic (MVL). Among all different transistor technologies, CNTFETs proved to have the highest performance [2]. In MVL each digit can hold multiple states which results in a better performance than binary circuits [3]. Plications [4], Memory [5], [6], RRAM (Resistive Random Access Memory) [7], Ternary Logic Systems [8], [9], and VOLUME 9, 2021. This paper uses CNTFET transistors and unbalanced ternary logic system (Low: 0, Middle: 1, High: 2) that is equivalent to (0, Vdd/2, Vdd)

TERNARY CIRCUITS CHALLENGE
CNFET TRANSISTOR
A D1 D1 Ap
PROPOSED TERNARY COMBINATIONAL CIRCUITS
SIMULATION RESULTS AND COMPARISONS
B D2 Bn B 1
CONCLUSION
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