Ultra-high aspect ratio poly-Si FinFET using an improved spacer formation technique

Abstract

An improved spacer formation technique was proposed and developed to fabricate poly-Si fin field-effect transistors (FinFETs) with an ultra-high aspect ratio. The as-demonstrated FinFETs have a fin channel with a width and height of 22 nm and 230 nm, respectively, corresponding to an aspect ratio of 10.5. The electrical and temperature properties of the FinFETs are described in detail in this paper. The poly-Si FinFETs exhibit a steep subthreshold swing (196 mV/dec), a low leakage current (∼10−14 A), a high on/off current ratio (2.2 × 107 at VDS = 0.1 V), and a low drain-induced barrier lowering effect (0.28 V). The excellent switching characteristics are attributed to the ultrathin channel body and the multi-gate structure combined with high-k Al2O3 dielectric. Furthermore, the electron field-effective mobility increases as the temperature increases. An analytical fitting model was derived and was utilized to account for this phenomenon. The fitting results indicate that the positive temperature coefficient originates from the grain boundary-controlled mechanism in the low gate voltage regime.