Abstract
Abstract Intel's EM (electromigration) package level stress lab has historically used 1mil aluminum wire to bond to pads 53 μm by 60 μm, with a pitch of 86 μm by 88 μm. The lab was challenged to align its wedge bonding capabilities to match the pitch used at wafer level probing with a pad size of 30 μm by 37 μm and pitch of 43 μm by 50.6 μm. In order to achieve the 43 μm by 50.6 μm pitch, 0.7 mil aluminum wire and an ultra-fine pitch wedge was used. In this paper, the benefits or matching the wafer level probe card capabilities are discussed as well as the concerns and considerations of implementing such a small pitch process. The primary concerns are heel shorting and bond placement repeatability but many factors influence these parameters. A brief summary of electrical testing performed to validate the process is discussed as well as new challenges that have arose due to the new testing capabilities.
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