Abstract

The continuous miniaturization of field-effect transistors (FETs) has propelled microprocessors to unprecedented levels of integration. However, further scaling encounters a critical trade-off between integration density and power efficiency. To transcend this limitation, a new class of steep-slope transistors has emerged, capable of surpassing the subthreshold swing (SS) limit but imposing stringent requirements on gate electrostatics. In this Perspective, we propose atomically-thin, one-dimensional (1D) materials as promising candidates for steep-slope switches. These materials offer distinct advantages in electrostatic integrity, crucial for overcoming traditional scaling bottlenecks. We delve into the underlying operational mechanisms to elucidate design methodologies and optimization strategies for 1D steep-slope transistors. We anticipate that by engineering the density of states distribution and carrier injection mechanisms, these transistors will achieve unparalleled performance and energy efficiency, representing a new frontier in device scaling. Our insights seek to facilitate future research and development in this transformative area of semiconductor technology.

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