Ukrainian National Encryption Standards for FPGA Based Embedded Systems

Abstract

The paper presents the hardware implementation based on FPGA of the main cryptographic transformations of the symmetric transformation algorithm of DSTU 7624:2014 and the stream cipher of DSTU 8845:2019, which are the national encryption standards of Ukraine. In the case of DSTU 7624: 2014 developed and implemented a hardware implementation for multiplication of two polynomials modulo x8+x4+x3+x2+1 in the form of a combinational circuit that allows to execute the MixColumn transformation by one cycle. SubBytes transformation is implemented based on asynchronous read-only memory. For stream cipher, DSTU 8845:2019 the nonlinear function T are implemented as subtitution byte operation in the form of precalculated cells of ROM memory. The multiplication function by α and α-1 in Galois field arithmetic GF (2 64) is realized based on ROM and combinational logic. The control of the modes of operation of the shift register with linear feedback is performed based on a FSM. Both hardware implementations of encryption standards have been verified by the authors according to the specified data in the standard, and their HDL code can be provided by the authors for further research to interested parties.