UHNVM: A Universal Heterogeneous Cache Design with Non-Volatile Memory

Xiaochang Li,Zhengjun Zhai

doi:10.3390/electronics10151760

Abstract

During the recent decades, non-volatile memory (NVM) has been anticipated to scale up the main memory size, improve the performance of applications, and reduce the speed gap between main memory and storage devices, while supporting persistent storage to cope with power outages. However, to fit NVM, all existing DRAM-based applications have to be rewritten by developers. Therefore, the developer must have a good understanding of targeted application codes, so as to manually distinguish and store data fit for NVM. In order to intelligently facilitate NVM deployment for existing legacy applications, we propose a universal heterogeneous cache hierarchy which is able to automatically select and store the appropriate data of applications for non-volatile memory (UHNVM), without compulsory code understanding. In this article, a program context (PC) technique is proposed in the user space to help UHNVM to classify data. Comparing to the conventional hot or cold files categories, the PC technique can categorize application data in a fine-grained manner, enabling us to store them either in NVM or SSDs efficiently for better performance. Our experimental results using a real Optane dual-inline-memory-module (DIMM) card show that our new heterogeneous architecture reduces elapsed times by about 11% compared to the conventional kernel memory configuration without NVM.

Highlights

Solid state drives (SSDs) are often used as a cache to expand the memory capacity for the data-intensive applications [1,2,3,4,5]
The Intel Optane DIMM has been configured in app direct mode with a capacity of 128 GB
We evaluate the dd application with universal heterogeneous cache hierarchy design for NVM (UHNVM), which can distinguish the looping data and store looping data into Optane DIMM

Summary

Introduction

Solid state drives (SSDs) are often used as a cache to expand the memory capacity for the data-intensive applications [1,2,3,4,5]. Some tried to use hardware emulators which include Intel’s persistent memory emulator platform that mimics latency and bandwidth of NVM [17,18], plain DRAM designs [19,20,21,22], and battery support DRAM designs [23]. Those hardware emulators are rather complicated to perform NVM features. The previous studies conducted without real NVM devices often fail to produce meaningful results, because most of their experiments are based on the emulation mechanisms that do not model actual behaviors and performance of product

Methods

Results

Conclusion