Type-III closed loop control systems-Digital PID controller design

Abstract

The problem of tuning digital PID controllers for type-III control loops is investigated in this work. Type-III control loops are capable of achieving perfect tracking of step, ramp and parabolic reference signals with zero steady state position, velocity and acceleration error. The proposed PID control law involves any dominant time constants of the process itself, and any parasitic dynamics introduced by both the process and the controller, i.e. time delays within the closed control system. The development of the proposed control law takes place in the frequency domain and basis of the theory is the principle of the Magnitude Optimum criterion. The final control law consists of closed form expressions which involve also the controller's sampling time Ts. The potential of the proposed theory is justified for the control of several benchmark process models throughout simulation examples. The affect of the choice of the controller's sampling time is investigated further to the step and frequency response of the control loop both for the output of the control loop and the controller's command signal.