Abstract
AbstractIn the routing in VLSI and printed circuit board (PCB) using the multilayered board, a routing technique is considered to reduce the number of vias produced in the routing. It is shown that the problem to determine the routing and layer assignment, to minimize the number of vias without considering the constraints of the line width and the line spacing, is NP‐hard even if the net is restricted to be the two‐terminal net. On the other hand, the following polynomial‐time algorithm is proposed.Let the number of continuous intervals of terminals not containing the local net that can cover all terminals be δ (by local net is meant a net with both ends in the same interval). Then there exists a polynomial‐time algorithm when δ is 2 and the number of layers k is a constant or when k is 2 and δ is a constant.This paper proposes a polynomial algorithm based on the dynamic programming which can handle both δ and k as parameters. Furthermore, a method also is proposed in which the partition into intervals is arbitrary and the local net can be contained. In addition, the total number I of the local nets can be handled as a parameter; I and δ are in a trade‐off relation. A method is discussed which solves the problem with minimum complexity in terms of the time estimated by the proposed method.
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More From: Electronics and Communications in Japan (Part III: Fundamental Electronic Science)
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