Abstract

"By technology scaling and integrating many cores on a chip, two-dimensional (2D) NOCs face significant challenges. Three-dimensional (3D) NoCs have been introduced to improve the performance of 2D NoCs. However, 3D NoCs have some issues, including thermal challenges and implementation cost of Through Silicon Vias (TSVs). In this paper, a partially connected 3D NOC is implemented, which employs a TSV index in the routing procedure. We propose a two-step thermal-aware routing algorithm that uses the index value to find the optimum 3D router to traverse between layers. This index informs about the position of the most suitable elevator for vertical transition. To overcome thermal challenges and distribute traffic over the low-temperature region of the network, we add thermal information to this index. The packets find the best elevator based on its distance to the 3D router and thermal information. The simulation results indicate that our routing algorithm improves network latency by 50% compared to other thermal-aware routing algorithms.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.