Abstract

The authors propose a systolic block Householder transformation (SBHT) approach to implement the Householder transformation (HT) on a systolic array as well as its application to the recursive-least-squares (RLS) algorithm. Since the data are fetched in a block manner, vector operations are in general required for the vectorized array. However, by using a modified HT algorithm, a two-level pipelined implementation can be used to pipeline the SBHT systolic array both at the vector and word levels. The throughput can be as fast as that of the Givens rotation method. The approach makes the HT amenable for VLSI implementation as well as applicable to real-time high throughput applications of modern signal processing. The constrained RLS problem using the SBHT RLS systolic array is also considered. >

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call