Two Memristors-Based XOR Logic Demonstrated With Encryption/Decryption

Abstract

In this study, an optimized XOR logic gate is briefly proposed based on memristors. The proposed XOR exhibits a simple structure that comprises two memristors; it requires merely two steps to complete logic. The inputs of the gate are applied by voltage and memristive resistance, and the output is stored as the resistance value of the output cell. Furthermore, the encryption and decryption based on such a circuit have been verified by performing a parallel electrical test successfully. At the same time, the parallel scheme and the cascaded serial scheme are compared in detail. Moreover, the mentioned energy-efficient circuit helps achieve more complex logic functions. Abiding by Kirchhoff's law, the effect of the memory window and the variation of devices' parameter on the calculation accuracy has been further analyzed in depth, which helps develop a complete binary logic calculation theory. On that basis, a digital in-memory calculation system can be more effectively built based on memristors.