Two-dimensional simulation of the thermal stress effect on static and dynamic VDMOS characteristics

Abstract

Using a two-dimensional simulator, the effect of the thermal stress on static and dynamic vertical double-diffusion metal oxide semiconductor (VDMOS) characteristics have been investigated. The use of the device under certain thermal stress conditions can produce modifications of its physical and electrical properties. Based on physics and 2D simulations, this paper proposes an analysis of this stress effect observed on the electrical characteristics of the device. Parameters responsible of these modifications are determined. Approximate expressions of the ionization coefficients and breakdown voltage in terms of temperature are proposed. Non-punch-through junction theory is used to express the breakdown voltage and the space charge extension with respect to the impurity concentration and the temperature. The capacitances of the device have been also studied. The effect of the stress on C– V characteristics is observed and analyzed. We notice that the drain–gate, drain–source and gate–source capacitances are shifted due to the degradation of device physical properties versus thermal stress.