Abstract

In this paper, the multi-negative conductance property detected at low temperatures in a silicon-on-insulator insulated-gate pn-junction device with a 10-nm-thick silicon layer is described. Important aspects of lateral low-dimensional tunneling process are examined by a theoretical formulation. A comparison of the characteristics of devices with a 10-nm-thick or a 90-nm-thick silicon layer indicates that the strong two-dimensional confinement effect plays an important role in multi-negative conductance. The theory predicts that a “resonance effect” between two subband levels results in the multi-negative conductance in the device with the 10-nm-thick silicon layer.

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