Abstract
In this work, we have successfully demonstrated the junctionless (JL) transistors with two-dimensional-like (2D-like) nano-sheet (NS) material, amorphous indium tungsten oxide (a-IWO), as an active channel layer. The influences of the different gate insulator (GI) materials and the scalings of GI thickness, a-IWO channel thickness, and channel lengths on the a-IWO NS JL transistors (a-IWO NS-JLTs) have been studied for the purposes of low operation voltage (gate voltage ≤2V) and high performance. The 2D-like a-IWO NS-JLTs exhibit low operation voltage, low source/drain (S/D) contact resistance (RC) and other key electrical characteristics, such as high field-effect mobility (μFE), near ideal subthreshold swing (S.S.), and large ON/OFF currents ratio (ION/IOFF). The remarkable device characteristics also make the proposed 2D-like a-IWO NS-JLTs promising for system-on-panel (SoP) and vertically stacked (VS) hybrid CMOS applications.
Highlights
Indium oxide (InOx)-based transparent amorphous oxide semiconductor thin film transistors (TAOS TFTs) with wide band gaps have been developed and applied for display and for other applications, like flexible electronics, optoelectronics, and mobile electronics owing to superior uniformity, low-temperature processes, and high field-effect mobility[9]
The ON-state currents (ION) and S.S. of bottom metal gate (BMG) a-IWO NS-JLTs are enhanced by shrinking the HfO2 gate insulator (GI) thickness (HfO2 GI = 10 nm) thanks to the better gate controllability
BMG a-IWO NS-JLTs with HfO2 GI = 10 nm and a-IWO channel = 10 nm have the highest ION and μFE, the most positive VTH, highest ION/IGZO FETs with ultra-low OFF-state currents (IOFF), and steepest S.S. are accomplished in BMG a-IWO NS-JLTs with HfO2 GI = 10 nm and a-IWO channel = 4 nm for low operation voltage applications
Summary
Indium oxide (InOx)-based transparent amorphous oxide semiconductor thin film transistors (TAOS TFTs) with wide band gaps have been developed and applied for display and for other applications, like flexible electronics, optoelectronics, and mobile electronics owing to superior uniformity, low-temperature processes, and high field-effect mobility (μFE)[9]. We will study the influences of the different gate insulator (GI) materials and the scalings of GI thickness, a-IWO channel thickness, and channel lengths on the electrical characteristics and performances of a-IWO NS-JLTs. In addition, a low power and high performance CMOS inverter based on low temperature devices is the basic and essential component in digital circuits for the pressing applications such as wearable electronics and IoT technology. Some hybrid CMOS inverters constructed by low temperature n-channel TAOS and p-channel poly-Si TFTs had been studied and realized, the electrical characteristics of TFTs were performed with high operation voltage, poor S.S, and large IOFF in these previous studies[18,19]. The matched electrical characteristics of n- and p-channel devices with low operation voltage and low IOFF are exhibiting the promising candidate for future VS Hybrid CMOS applications
Sign-in/Register to view highlights & summary Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
